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Nearly any uses for flexible electronics would also be satisfied by sufficiently small electronics such that lack of flexibility doesn't matter.

Eg. rather than having every pixel in your flexible screen be flexible, you make each pixel rigid and have the joints between pixels flexible.

In this case, this design is based on SERV, which uses ~2100 gate equivalents, which in a recent tech node would be 40 um^2. That means you could fit a 10x10 grid of these in a single pixel on an iphone screen.

I really can't think of a use case where a region 1/100th of an iphone screen pixel being rigid would be a problem.

Some questions you might consider which would help you to think of some use cases;

1) How would wiring to you processor work?

2) How many flexible compute applications are currently using just really small processors?

3) Given that Pragmatic has raised a lot of money, what was it in their use case that the investors thought would make a better product?

4) Besides flexibility, are there other requirements in this product space?

5) Given that you've just imagined a product with a flexible screen but solid pixels, does this exist on the market? Are there flexible screens on the market? How do those screens choose to implement flex versus the idea you have proposed? What factors might make their choices better (or worse) than the idea you proposed?

I'm not being critical here, I think you start with an excellent starter question which is "Would the requirements be satisfied by sufficiently small electronics such that [the] lack of flexibility [in the electronics] doesn't matter?"

The trick then is to see if you can see how other people who invested time and money in answering either that, or a closely adjacent, question answered it. When you do that you'll get to see what they thought the overall requirements were vs the technology they picked, and perhaps it might inform if the Pragmatic solution would be a better fit or the 'tiny electronics' solution would be a better fit.

I'll be the first to admit that I'm 'weird' in that I really do enjoy going down these sort of engineering optimization rabbit holes to develop a better understanding of what problems various proposed solutions are trying to solve.

> 1) How would wiring to you processor work?

My (relatively limited) experience is that this is what really makes wearable projects obnoxious.

Even if you have a chip with a tiny footprint, you either put it on a breakout board that isn't tiny or you spend twenty hours soldering nearly microscopic bits of magnet wire to it. It's the same for the piles of passive components and peripherals that every project requires, the voltage regulators and smoothing capacitors and power transistors and stuff: You either attach everything to a big PCB or you're faced with a spaghetti nightmare of point-to-point wiring that makes "normal" dead-bug circuitry, the kind you might find embedded in a block of resin for aesthetic points, look like a walk in the park.

Flexible processors don't necessarily solve that problem, but they definitely demonstrate that flexible circuits in general are advancing in useful ways, better signal quality and longer runs and better process yield. The bigger these things get the better they are for replacing that mess of integration spaghetti that I always see DIY wearable projects suffering from.

(I think that industrial wearables typically solve this by concentrating everything complicated down to a rigid brain-box, c.f. smart-watches or those heated jackets that have a socket for a power tool battery in the pocket.)

> or you spend twenty hours soldering nearly microscopic bits of magnet wire to it.

A real chip would only need two or three contacts to vastly outperform thing demonstrated here. These would probably not be soldered, they would ideally be bonded directly to the chip.

Imagine a near-microscopic 4-ball BGA on a bit of flexible PCB, except the PCB material can flex in multiple axes simultaneously.

Isn't that kind of like how RFID labels work? That's probably the most common use case for flexible anything at the moment, and they work great

You can look at die attach[1] which basically solders to pads on the circuit board (no magnet wires required :-)).

[1] "Die Attach Comes to PCBs" --- https://www.eeweb.com/die-attach-comes-to-pcbs/

That article describes traditional chip on board construction that has been in use for decades. Buried at the end it mentions wire bonding as the final step. i.e. pads are up. Flip chip mounting requires careful attention to thermal expansion coefficients. You're not going to do that on any run of the mill cheap board or flex materials.

> The trick then is to see if you can see how other people who invested time and money in answering either that, or

OT, but I've been wondering how one might teach this young. Perhaps LLM-generated business case studies? Other thoughts? Part of the context is generative storytelling might permit intensively overlaying implicit curriculum on to existing learning objectives (eg, it's a chemistry problem, but chosen to also scaffold biology and illustrate supply chains).

> 1) How would wiring to you processor work?

Sure, there's a modulus gap to be interfaced, but flexible circuits have been worked on forever.

The whole point is of this tech is that the transistors themselves are flexible.

But since the transistors they end up with are orders of magnitude worse than what the microprocessor age started with, to me this just shows that this tech is not anywhere close to practical application.

Yes, the entire chip (wiring and transistors) is flexible. Which is something I find kind of amazing. Back in 2008 there was a company in the UK called 'Plastic Logic'[1] that was going to make an e-reader that could be rolled up. Back when organic LEDs were just starting to be possible and this stuff was living on a glass substrate, doing "all" of the circuits in long change hydrocarbons was a pretty revolutionary idea.

My original point was that dismissing the technology out of hand because you imagine you could solve the same problem with tiny ICs is probably premature. Dismissing any technology coming to market because you think it doesn't solve any problem is usually a bad idea because it takes non-zero effort and resources to bring anything to market. As a result, if you imagine what something is irrelevant because there are other proven solutions, then take that as a signal to say "Hmmm, what am I missing here?"

> But since the transistors they end up with are orders of > magnitude worse than what the microprocessor age started > with, to me this just shows that this tech is not anywhere > close to practical application.

This doesn't really track though does it? The "first" microprocessor, the 4004 ran at 750kHz max. Most of the challenge here appears to be heat dissipation as plastic melts at a much lower temperature than silicon, but the chemistry is still interesting.

I completely agree that this isn't going to displace servers in the data center any time soon, but I can imagine applications for an all (or nearly all) plastic computer on a flexible plastic substrate.

[1] Their IP (not the reader though) lives on at https://www.e-pi.com/

> The "first" microprocessor, the 4004 ran at 750kHz max.

The 4004 wasn't useful to power a general-purpose computer as we think of one today, it was made for a 4 function calculator and it's hard to find many examples of it being used in other systems online. It took another 10 years of Moore's Law for the ingredients to come together and microprocessor-powered desktop computers to achieve critical mass.

Look at Table 2 in the (awful, IMO) Nature article. This thing is 10x slower than even a 4004.

> Dismissing any technology coming to market because you think it doesn't solve any problem is usually a bad idea because it takes non-zero effort and resources to bring anything to market. As a result, if you imagine what something is irrelevant because there are other proven solutions, then take that as a signal to say "Hmmm, what am I missing here?"

100%!

But is there reason to think Moore's Law is happening here?

Or did these researchers just print some minimum viable transistors on kapton?

Slower, clock wise. My guess, considering the IPC, is that it could perform better.

The IPC is far worse too - this is a Serial RISC-V machine - Ie. it takes ~~60 clock cycles for 1 instruction.

Ie. IPC will be 30x worse than a microcontroller core, and 200x worse than a desktop PC core.

(couldn't find exact numbers)

Thank you

40 um^2 might cover the logic (although I think your logic transistor count is a factor of three low; and something like this is most likely to be made on a 45 nm or bigger process), but doesn’t cover IO pads. If you’re willing to wire bond directly to a flex circuit you may be able to use pads on to order of 50 um x 50 um (each! Likely need 6 or 8 pads to be useful), but that’s a hell of a process, and you’d have to encapsulate afterwards, adding bulk. If you want to flip-chip mount it’s pretty hard to go under 1 mm x 1 mm for a useful microcontroller, although there’s some stuff out there at 600 um x 600 um or so from memory — but pad sizes under 300 um then bump up your resolution requirements for the flex circuit you’re bonding to.

They are spot-on with the transistor count for the CPU (though I believe it doesn't include all your RAM registers). SERV is a serial CPU that can range from doing calculations just 1 bit at a time up to doing them 4 bits at a time.

https://github.com/olofk/serv

It's pretty incredible considering the 6502 was already considered tiny when it was released with just ~4500 gates vs the 6500 in the 8085 and the 8500 in the z80.

6502 has 3510 Transistors. 4500 gates seam impossible.

Ignoring flexibility and cost/performance, this may be a sign that rapid chip fab turnaround times are possible. These were made by Pragmatic Semiconductor [1], who claim they can make chips within 48 hours and deliver within 4 weeks (likely due to their use of unconventional materials). Traditional silicon fabs, including trailing-edge foundries and TSMC, take 2-9 months. I do wish they'd emphasized this instead of flexibility.

[1] https://www.pragmaticsemi.com/

Yeah but traditional silicon fabs aren't making 12k gate chips.

What's the turn around time on 12k gate chips from a traditional fab?

Just googling really quick: the Lattice Semiconductor LFE5U-12 is a 12k-LUT FPGA (and a LUT is way more flexible than a gate).

So realistically, if you need fully custom digital logic, you'd buy LFE5U-12 instead and program that.

So that's $16 FPGA from widely available distributors (like Digikey) who likely can afford 1 or 2 day shipping.

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Custom chip design for a flex-circuit is interesting, but only if you have substantial analog parts that cannot be easily implemented by an FPGA.

The power profile of an FPGA is very different (worse) than dedicated silicon. Both the background current and cost of a gate switch. There are a lot of situations where that isn't acceptable.

I suspect the power profile of an FPGA is better than this flex-silicon...

True, that's definitely possible. I was giving the habitual answer (that I occasionally need to explain to a client at work) why you need to spend $2m having an ASIC made when "it's just digital logic and we got the prototype going in a month"

They usually care about at least one of - size, power, cost.

At a certain threshold, miniaturization of electronics can become counterproductive for space applications. The amount of radiation received per unit of area remains constant but our transistor density keeps increasing, which means that every individual event threatens to wreak an increasing amount of havoc (e.g. more bits flipped in RAM per cosmic ray). Considering the increasing amount of error correction and redundancy needed to counter this, we may reach a practical floor on transistor density for such domains.

It's also, if not more so, a factor of transistor voltage. 1.1V transistors are less prone to upset events than 0.7V. It's possible (assumption, here) that some 3+ volt circuits are still used for critical components of the system

It would be possible to use much higher supply voltages if silicon were replaced with a semiconductor material having a higher band gap.

The main obstacle that has prevented this until now is that in all high-bandgap semiconductors it is easy to make only transistors of a single polarity, not transistors with both polarities, as required for CMOS logic. For high circuit densities it would be difficult to replace the CMOS logic, because all alternatives have higher idle power consumption.

... which is a huge problem for solar panels ... but why would it matter for microprocessors?

You don't want transistors operating under the influence of outside forces. More than just having a bit flip in your data, what if one of the control lines in the CPU flips and the entire instruction stream gets corrupted... while you're trying to perform orbital maneuvers.

You use multiple processors and a consensus algorithm.

You can do that.

Leading-edge fab nodes are way too costly for this kind of use. Specialty, low-volume chips are the domain of trailing-edge tech nodes, sometimes even at the μm level. Besides as some sibling comments mentioned, contact pads for off-chip wires would get so big as to ultimately take up most of the area, so there would be no real advantage to using the finer nodes.

Most microcontrollers today are using 40-90 nm processes. That's not the micron level at all. Chips that need current-handling capabilities or have weird needs will use bigger process nodes. This is a big part of why automotive electronics use old nodes.

You're thinking of power mosfets, but automobiles have entertainment systems too.

The power electronics are more complicated than MOSFETs, and the entertainment systems use chips on modern process nodes. The main use I can see for MCUs/MPUs on old process nodes is replacement parts for 10+ year old equipment.

The article is about a CPU, not a display technology - there's a big difference in functionality and fabrication between those two things, so your iPhone screen pixel example doesn't really fit this use case.

I think this flexible CPU tech is interesting. If it's possible to build an ADC onto it and monitor flexible sensors, that would open up one kind of possibility, and probably an advantage over chip-on-flex solutions. I'm sure there are many more interesting uses for this.

It's impressive that a CPU can be implemented with this tech, but interesting things can be done with far fewer gates.

You would need to connect wires to that little 40 um^2 mote to do anything, though, which in practice makes the rigid places needing strain relief a lot larger.

It also makes the amount of strain proportionately smaller.

We're talking about a 3mm bend radius here, so there's a few orders of magnitude to work with.

Not as many as you think, because you need to have targets bigger than the ~20um wirebond wire to solder to... and the little wire and bond pad are not very tolerant of strain at all.

Bonding wires to the thing in the first place easily increases its size by a couple of orders of magnitude.

What are the fab requirements of the two techs? If the ffc version can be manufactured with as basic tech as ffc, then that is huge.

Also bonding small rigid things to flexible things is never actually the same as a flexible thing, in several different ways.

These are not equivalent even if you can manage to use either one for some use cases by accepting various compromises.

> you make each pixel rigid and have the joints between pixels flexible

Alternative 1: Assemble about 3 million individual rigid pixels of an iPhone screen on a flexible substrate, keeping the gaps flexible.

Alternative 2: Produce a single flexible screen piece, requiring no per-pixel assembly.

Which alternative, to your opinion, is likely to cost less?

>Nearly any uses for flexible electronics would also be satisfied by sufficiently small electronics such that lack of flexibility doesn't matter.

we make microelectronics as complex as we can because 128 bits would be better than 64 bits, and floating point, and parallelism, pipelining, speculative execution, and caches, etc.

we already make microelectronics as small as we know how, because speed of light makes a difference, and power dissipation also.

and our chips, already completely consumed by the tasks we give them, are too big to fit your definition of flexibility not mattering.

So-ooo-o, if our chips were flexible it would solve the problem we are both trying to solve, which will not be solved your way, except in some uncertain future.

So, nothing particularly interesting here? When I first saw 'flexible' I immediately thought about balancing a chip's specifications, not its material flexibility!

Flexible circuits are interesting and worthy of discussion.

Really, the whole process here is fascinating to me. There's been a lot of progress in flex circuits over this recent decade.

None of it is electrically or computationally new. It's 1980s tech from a computation perspective. But mechanically??

Being able to weave circuits seamlessly into clothes, tapestry, and such is pretty cool. If only for the cosplay / costume designers but that's still a pretty / beautifully kind of display (especially with a few fiber optics to move lights around).

One of the interesting electro-mechanical issues is that flex circuits are necessarily thin, making grounding / return currents exceptionally consistent. On the downside however, solid planes / ground fills are bad for flexibility, so you apparently need to make a ground-grid instead of ground-fill.

Very interesting tech overall. Even if it's applications are quite small right now.

It's funny, I thought the exact opposite.

> Flexible... isn't that the point of any central processing unit, to be able to handle many differing types of work?

Oh, pliable? that's cool, I wonder how that works?

I agree, this CPU has double the transistors of a 6502, and runs at 1/20th of a 6502 speed. A silicon product will be faster, the size of a printed dot and use less power.

No word either on how many bending cycles the product supports.

Still, it's early days, and flexibility might have some use.

Don't you have to put those BGAs on some kind of pad?

60 kilohertz on 6 milliwatts sounds pretty bad (that's 100 milliwatts per megahertz and so 20 milliamps per megahertz if we assume 5 volts, while 0.06 milliamps per megahertz is common for low-power processors) but it's actually far, far worse than it sounds because serv is bit-serial, requiring, i think, 32 cycles per instruction. so you're looking at something like 5000 times the energy consumption of existing off-the-shelf microcontrollers

the suggested price of a dollar is about 10x worse than something like the py32, ch32v003, or pmc150, which are also faster and more power-efficient

that doesn't mean this is bad research! it just means it isn't yet developed to a state where there's likely to be a market for it. it's very helpful to know that serv occupies 12600 gates, for example, and that the flex-rv process provides 720 gates per square millimeter. it's very plausible you could design something useful with it that had 600 gates, was less than a square millimeter, used 300 microwatts at 60 kilohertz, and cost five cents, for example; that's a niche that silicon photolithography is struggling to fill because of high per-chip costs. you could fit a 6502 into twice that

another potentially interesting niche is low power density; for implanting into your body you don't want hot spots that can burn your tissues (though you'd have to encapsulate the igzo behind something biocompatible)

The 1-bit serial version is 2100kGe (excluding registers). Their talk claims the 4-bit variant is 2.5x larger (while being 4x faster) which is around 5250kGe. Add in all the registers and you get pretty close to that 13kGe number (assuming you're using 31 registers instead of 15 in the 32e spec).

thank you for the extra context! i had assumed they were using the 1-bit serial version and that for whatever reason they just needed a lot more gates than anyone had expected from fpga simulations. i didn't realize serv had a nybble-serial option, and that's a very significant difference. so it's closer to 1000× the energy consumption of off-the-shelf microcontrollers than 5000×

> Each Flex-RV microprocessor has a 17.5 square millimeter core and roughly 12,600 logic gates. The research team found Flex-RV could run as fast as 60 kilohertz while consuming less than 6 milliwatts of power.

This is pretty bad from a power efficiency perspective. KHz speed silicon microcontrollers are closer to ~dozens of microwatts, about two decades of magnitude less power than this flex-circuit.

Furthermore, small silicon dies can be placed into flexPCBs. I'm sure a flexchip has more flexibility than a solid silicon die on a flex board but there's a question of how much flex is actually needed in products?

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Still, I recognize that a fully functional CPU on this process is a major achievement. I'm just trying to think of a commercial application, that's all.

E-textiles, probably. There's a small, but real, niche trying to put circuitry onto/into fabrics. Traditional flex PCBs get you pretty close, but any large IC creates a limited bend radius and a stress point that will fail very quickly. Using lots and lots of tiny dice for this would technically work, but it's extremely impractical unless you're building your widget by the millions.

But yes, the potential applications are quite limited. Flexible electronics just aren't as useful as people think. I guess it just sounds really cool, like transparent LCDs.

The thin nature of flex circuits have interesting implications for capacitance / parasitic inductance. I've been told that flex circuits are far easier to pass EMC testing due to the physically closer ground/reference return path.

Of course: with the caveat that solid planes of copper are not flexible and will crack. So ground-grid are the best you can do. But physically closer / physically thinner circuits have niche advantages.

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But I'm talking about traditional silicon dies on a flexpcb.

This article is about printing some kind of flexible chip to begin with. It's cool and relatively new, but silicon + flexpcb will be the main technique for e-textiles (and other flex applications) for the near future.

Still, one more tool in the toolbox for electrical engineers. Niche as it is, it's still a tool with likely some good application somewhere.

>I've been told that flex circuits are far easier to pass EMC testing

That’s not correct. It really depends what application, industry and type of testing.

I would say generally it’s the opposite due to worse shielding properties (and worse pi), but it’s a huge oversimplification that’s extremely dependent on application and testing type

"a small, but real, niche" - is it though?

It's been an intriguing notion since the time of the dinosaurs, but what is an actual problem that it solves? I've never seen any textile electronics that delivered more than a novelty.

A lot of video game characters, especially SciFi ones, have glowing clothes of some kind with mesmerizing patterns. The easiest way to create this effect is a combination of etextiles, LEDs and maybe some fiberoptics (which are also flexible enough to be woven into clothing).

Recreating video game characters in real life is a niche. Cosplay. And there's also e-Fashion that is beyond just copying costumes from video games.

You'll still need to hide the battery box somewhere, and likely also the LEDs are inflexible, but by making more of the circuit etextile / flexible, it allows you to hide the electronics in the clothing itself, woven into the clothes and properly integrated.

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An almost fully rigid design with a few flexible parts (ex: the hinge of the Motorola Fold) is also hot and fashionable right now.

Motorola RAZR (the new foldable screen one) needs a hinge, and the electronics that are integrated into the hinge need to be as flexible as the hinge.

Adding little bits of flexibility, especially to space constrained applications like Phones, does add new useful design features above and beyond "novelty" status, IMO anyway.

This is mostly for medical applications. Wearable, maybe implantable, electronics for monitoring vital signs are a real thing that could completely change form with flexible processors.

Digital demurrage currency bank notes that show you the current balance

> Performance varied between a 4.3 percent slowdown to a 2.3 percent speedup depending on the way it was bent.

I have practically zero knowledge on the physics behind semiconductors to try to think why this could occur but I find it fascinating nonetheless.

My expectation is that the core clock circuit has its capacitance and/or inductance change, this changing the timing of the clock.

+/-5% is a region where everything in the digital domain probably still works. Your rise/fall time and dead-time / other critical timings need to be robust against some degree of variability. Transistors can have rather wide manufacturing variability after all (certainly wider than 5%).

So everything still works but the core clock is changing. Which btw, happens in traditional silicon circuits as they heat up or cool down.

A low precision RC oscillator changing by 5% or so between 20C and 100C is within expectations. I'm fact, a -50%/+100% change wouldn't surprise me.

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Old var-caps (variable capacitors) by twisting them tighter or looser. No joke. So that's where my expectation that they've changed the capacitance of some core element that controls an important clock.

Many resistive materials, especially those that are semiconductors, have changes of resistivity caused by mechanical strain.

This so-called piezoresistive effect is frequently used for measuring the deformations of various objects, by attaching piezoresistive wires to them, which can measure for instance the amount of bending of the object.

Such a flexible integrated circuit might also have changes in the resistance of the transistor channels or of the interconnection traces, which will change the maximum permissible clock frequency. If an RC oscillator is used to generate a clock signal, its frequency will change with the bending of the circuit, more likely due to variations of the resistance than of the capacitance, because it is not likely for the bending to cause large variations in the thickness of the dielectric of the capacitors or in the area of the electrodes, even if that is also possible.

The variable capacitors whose capacitance is changed by twisting have this behavior because their electrodes overlap only partially and the twisting changes the area of the overlapping region. No such thing happens when twisting or bending a normal capacitor.

> which will change the maximum permissible clock frequency.

Emphasis on _permissible_ clock frequency. Because how is the core logic supposed to figure out how much the clock frequency changed or how much the resistance of the wires have changed?

> because it is not likely for the bending to cause large variations in the thickness of the dielectric of the capacitors or in the area of the electrodes, even if that is also possible.

Yes but no. Everything you said is correct, but you're looking at the wrong dielectric. The plastic PCB is obviously unchanging, even as it gets balled up.

However, there's another dielectric here that's normally ignored that suddenly becomes relevant. The _relevant_ dielectric (to this discussion) is the air. As the capacitor rolls up into a cylinder shape, the copper-air-copper capacitor has the dielectric (air) get thinner-and-thinner.

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However, to your point that this is "resistance"... the fact that "rolling one way" leads to -speed and "rolling the other way" leads to +speed suggests that its a resistance issue. Because the spring/resistance relationship is known. So stress/tension causes resistance of copper to grow, while pressure causes resistance of copper to drop.

If the oscillator is an RC-type oscillator (ex: a 555-timer like oscillator), then yes, I can see the resistance theory playing out. And 60kHz is slow enough that RC-type oscillators are possible.

> Because how is the core logic supposed to figure out how much the clock frequency changed

It is frequent for such logic circuits to use clock generators made with a so-called ring oscillator, i.e. with a chain of inverters containing an odd number of them, which is connected in a loop. The clock period will be a multiple of the delay through a logic inverter.

In this case the actual clock frequency tracks exactly all changes in the permissible clock frequency, regardless of their causes, including temperature and mechanical deformation.

> As the capacitor rolls up into a cylinder shape, the copper-air-copper capacitor has the dielectric (air) get thinner-and-thinner.

I am not sure which is the copper-air-copper capacitor to which you refer. On a PCB, there are parasitic copper-air-copper capacitors between traces, but they have very little influence on clock frequencies. On a normal integrated circuit, there is no air. The metal layers are separated by insulator layers and the top metal is covered by a passivation layer. This flexible circuit should also be covered by some passivation layer.

Replacing in your argument the copper-air-copper capacitor with a copper-insulator-copper capacitor, any circuit has two kinds of capacitors, those that are made intentionally, with two overlapped metal electrodes and a very thin insulator layer between them, and the parasitic capacitors that exist between any metal traces.

Your argument is valid for the parasitic capacitors, because the distance between traces will vary with bending and some parasitic capacitors will become larger, while others will become smaller. The effect of each of the parasitic capacitors on the permissible clock frequency is small and the global effect of all parasitic capacitors is unpredictable without a concrete circuit layout, because their changes with the bending may compensate each other.

For an intentional capacitor, the effect mentioned by you also exists, but in most technologies for integrated circuits the thickness of the insulator of the capacitors is very small in comparison with the lengths and widths of the electrodes. In this case only a very small part of the electromagnetic field is outside the internal space of the capacitor and its influence on the value of the capacitance is negligible. Perhaps the capacitors made with this flexible technology are not as thin in comparison with their area as in other technologies, in which case the effect mentioned by you could be measurable, but I doubt it.

Neither do I, but I can tell you if you manage to bend a normal CPU die the performance loss is 100% (because you broke it).

For those who don't know SERV is a serial RISC-V architecture - really small, fits in a Tiny Tapeout tile

https://github.com/olofk/serv

Any ideas on why they'd use NMOS [1] instead of CMOS if they're aiming for low power? Too many layers? My (amateur, outdated, and probably wrong) recollection is that CMOS dissipates very little power except when switching, but not so for NMOS.

[1] https://www.pragmaticsemi.com/app/uploads/2023/07/Pragmatic-...

Only in few semiconductor materials it is possible to make good transistors with both polarities, silicon, germanium and the silicon-germanium alloy being the main examples.

In most semiconductor materials it is possible to make good transistors only with a single polarity, either N or P, depending on the material.

So CMOS logic cannot be implemented in most semiconductor materials. This is the main reason why silicon has remained the principal material for complex logic circuits, even if there are a lot of materials with much better properties, except for allowing both polarities for transistors.

In the first decades of the semiconductor industry, the main advantage of silicon had been that it was possible to create a high-quality insulator layer on its surface by oxidation. However there are many years since this advantage is no longer relevant for high-density logic circuits, because all their MOS transistors use now insulators with high dielectric constant, e.g. based on hafnia, which are deposited on the surface of silicon in the same way they would be deposited on any other semiconductor.

CMOS requires very tight tolerances for the PMOS + NMOS transistors to cancel each other out exactly. Otherwise it doesn't work at all. In particular, you need to ensure that the PMOS and NMOS turn on at the same voltage, otherwise you risk just shorting Vcc to Vss (aka: Power to Ground).

NMOS was common in the 1970s before CMOS on silicon was figured out. I'm surprised to hear that this circuit is old-school NMOS, but I probably shouldn't be, as the CMOS step took a lot of research and effort back then....

If we're still at NMOS stage of production on this process, then its probably more relevant to think of analog-based designs. CMOS seems necessary if anyone is to achieve low-power modern-like designs.

NMOS was still core to a lot of older chips though, so digital logic still can work on that. But the power consumption will be necessarily huge in comparison to CMOS.

What’s interesting to me is that it loses 4% efficiency when bent. Like, I get why there’s some loss because of parasitic capacitance/inductance etc but 4% seems like… not very much?

I guess it helps a lot that it’s running at 60kHz. https://en.wikipedia.org/wiki/Parasitic_capacitance#Effects: “At low frequencies parasitic capacitance can usually be ignored, but in high frequency circuits it can be a major problem.”

> 60 kilohertz while consuming less than 6 milliwatts of power The IBM1401, the most popular computer in the world in the early 60s, ran at 11.5 microseconds per memory cycle = 87 kHz. True, it processed six bits at a time versus SERV's serial architecture but, still, both of these seem to be in the same ballpark, speedwise.

The 1401 takes 13 kilowatts of juice. So not even in the same universe with respect to power consumed per computation.

> The research team found Flex-RV could run as fast as 60 kilohertz while consuming less than 6 milliwatts of power.

They don’t give all details, but I think it’s safe to say there’s work to do w.r.t. performance/Watt, probably more so given that the CPU seems to be bit serial (https://github.com/olofk/serv), which I think means an addition takes 32 cycles.

From the linked Nature article: "The 5.8 mW power consumption is predominantly static (99%) because of the resistive pull-up logic."

This is super exciting, I love to see advances in low temperature semiconductor manufacturing. HOWEVER

> The research team found Flex-RV could run as fast as 60 kilohertz while consuming less than 6 milliwatts of power.

Those are TERRIBLE specs compared to silicon. Similar microcontroller specs are 1,000x faster at similar power consumption.

Youtube link from 7 years ago to give some context about the progress and also "flexibility": https://www.youtube.com/watch?v=01y6bR6ETpA

The positioning of this product is strange to me. The features and specs of the product don't seem very impressive, as others have pointed out, and the overall tone of the writing suggests someone who found something and is looking for what drawer it goes in.

The best things in life are the ones that can't be easily put in a drawer.

Very cool.

As Moore's Law runs out of steam it is time for the low end applications of computers to shine.

Lots of comments here saying how [relatively] inefficient this is, that utterly miss the point.

Putting cheap, good enough, CPUs into all sorts of places the "efficient " processors cannot go is going to revolutionise all sorts of applications

This is not unique, but representative of its class

Because wrapping it around a pencil is clearly a benefit(:

Flexible PCBs are convenient to embed in fabric.

Can’t wait to never hear about this again /s

What's the smallest commercially available electronic and can it be inserted into the brain?

Why am I having headaches?